Integrated circuit devices such as random access memories (RAMs) usually undergo device verification testing during manufacture. Typically, such verification tests are designed to detect both static and dynamic defects in a memory array. Static defects include, for example, open circuit and short circuit defects in the integrated circuit device. Dynamic defects include defects such as weak pull-up or pull-down transistors that create timing sensitive defects. Defects which have been identified in a memory may be repaired by issuing commands to the device to replace defective memory cells with spare memory cells placed on the device for that purpose. Such replacement is typically achieved by opening and closing fuses within the memory array.